Rick Wong, Engineer
Tim interviews Rick Wong an engineer and organizer of the IEEE CPMT Soft Error Rate Workshop.
Rick received his M.S. degree in electrical engineering from Santa Clara University and his B.S. degree in chemical engineering from UC Berkeley. He has over 30 years of industry experience. He joined Cisco Systems Inc., San Jose, CA in 2006 and has been engaged in IC component technology reliability assurance, SEU, WLR, ESD, failure analysis and reliability modeling. Prior to Cisco, he had worked on ASICs, FPGAs, TCAMs and memories. He has 18 patents and over 200 published papers
Rick and Peng Su from Juniper Networks are the co-originators of the upcoming IEEE CPMT Soft Error Rate Workshop in Sunnyvale, California on November 3, 2016.
In this episode, Rick and Tim discuss:
- The target audience for the workshop
- Details and how you can attend the Soft Error Rate Workshop
- The major advances and risks involving soft errors
Recorded October 2016.
8th Annual IEEE CPMT Soft Error Rate (SER) Workshop
Jointly presented by:
• IEEE CPMT Santa Clara Valley (SCV) Chapter
• Juniper Networks
• Cisco Systems
• Pure Technologies
Date: November 3, 2016 (Thursday)
Time: 8:30 am – 4:00 pm (Lunch will be provided)
Location: 1215 Borregas Ave, Sunnyvale CA (Map)
Attendance: On-site or Remote (Skype meeting)
We are pleased to announce that we will be holding our annual IEEE CPMT Soft Error Rate Workshop again this year. This will be our 8th annual event and we expect to offer the same quality technical talks and broad international participation.
With our focus on alpha-induced soft errors and unique offering of simultaneous on-site and remote participation, we have provided opportunities for publication and interactive discussion on a variety of critical subjects on SER.
For this year’s event, we will also try a new format: In addition to technical talks, we have invited experts in the field to offer tutorials on multiple subjects related to the fundamentals of alpha-related soft errors.
For technical presentations, we are looking for topics including but are not limited to:
- Advanced silicon nodes and device SER performance assessment
- Impact of SER on applications including automotive, medical, aeronautical, and networking
- Success stories of alpha emission or soft error control
- Wafer and assembly process control and monitor
- Techniques and approaches for alpha emissivity measurement
Abstracts can be submitted on this page or by replaying directly to this email.
To register for the event and check for further information including event program update, visit these websites:
- Register to attend the event: Click here (On-site seating is limited so register early!)
- IEEE CPMT silicon valley chapter’s event webpage: Click here
- Event website: Click here
We look forward to seeing you at the event!