Design For Test Archives

The Test Attributes of Controllability and Observability

If a tree falls in a forest with no one around to hear it, does it still make a sound?

If a fault occurs in a combinational circuit but its masked at the outputs is it still a fault?

If you can’t excite a fault from the circuit inputs does it really exist?

If you can’t propagate a fault to an output pin, does it matter?

In assessing an integrated circuit’s testability engineers consider the concepts of controllability and observability. In these specific characteristics of testability came up often the academic test literature of the 1970’s and 1980’s. The challenge back then was automatic test generation and fault simulation. [Read more…]

by Anne Meixner Leave a Comment

Labor Saving DFT: Built-In Self-Test

In honor of Labor Day, I thought I would jump over to the Built-In Self-Test (BIST) wing of the DFT Castle.

I will provide you with a quick tour. Then when you hear the term in a meeting you can follow along and ask a few questions.

BIST saves labor for the Automatic Test Equipment (ATE).

Though there’s no free lunch. BIST does require an engineer to labor—someone has to design it specific to the device under test (DUT). [Read more…]

by Anne Meixner Leave a Comment

A Primer on Design For Test

In a previous article I alluded to Design for Test (DFT) by mentioning a specific example.

The techniques have been around for decades. Just how long ago though?

I searched on “Design for Test” in the IEEE paper data base; the search resulted in 760 references the oldest being 1983.

Hmm there had to be earlier papers? So next I plugged in the key words “Design For Testability.” This time a list of 4,235 references appeared, the oldest one published in 1978. [Read more…]

by Anne Meixner 1 Comment

How to Test Clocked Circuits

What happens when you power up an electronics device with clocked circuits?

Well you have a clock running and you have clocked circuit elements, also known as sequential circuits. Latches, registers, basically any “memory” element. What could interfere with testing?

Do you know the state of that “memory element” when you start?

Heck No!

That’s a problem. [Read more…]